Searched refs:riscv_cpu_cfg (Results 1 – 11 of 11) sorted by relevance
94 if (riscv_cpu_cfg(env)->ext_smepmp) { in pmp_write_cfg()278 if (!riscv_cpu_cfg(env)->pmp || (mode == PRV_M)) { in pmp_hart_has_privs_default()323 if (riscv_cpu_cfg(env)->mmu) { in pmp_hart_has_privs()592 if (riscv_cpu_cfg(env)->ext_smepmp) { in mseccfg_csr_write()640 if (!riscv_cpu_cfg(env)->pmp || !pmp_get_num_rules(env)) { in pmp_get_tlb_size()
83 !riscv_cpu_cfg(env)->ext_zfinx) { in fs()96 if (riscv_cpu_cfg(env)->ext_zve32f) { in vs()174 if (!riscv_cpu_cfg(env)->ext_zcmt) { in zcmt()516 if (riscv_cpu_cfg(env)->pmp) { in pmp()537 if (riscv_cpu_cfg(env)->ext_zkr) { in have_mseccfg()546 if (riscv_cpu_cfg(env)->debug) { in debug()556 if (!riscv_cpu_cfg(env)->ext_zkr) { in seed()1239 *val = riscv_cpu_cfg(env)->mimpid; in read_mimpid()1424 if (!riscv_cpu_cfg(env)->misa_w) { in write_misa()2989 if (!riscv_cpu_cfg(env)->mmu) { in read_satp()[all …]
133 uint16_t vlenb = riscv_cpu_cfg(env)->vlen >> 3; in riscv_gdb_get_vector()149 uint16_t vlenb = riscv_cpu_cfg(env)->vlen >> 3; in riscv_gdb_set_vector()
352 if (!((extirq == IRQ_M_EXT) ? riscv_cpu_cfg(env)->ext_smaia : in riscv_cpu_pending_to_irq()353 riscv_cpu_cfg(env)->ext_ssaia)) { in riscv_cpu_pending_to_irq()756 if (!riscv_cpu_cfg(env)->pmp) { in get_physical_address_pmp()826 if (mode == PRV_M || !riscv_cpu_cfg(env)->mmu) { in get_physical_address()985 if (!riscv_cpu_cfg(env)->ext_svnapot && (pte & PTE_N)) { in get_physical_address()1131 if (riscv_cpu_cfg(env)->ext_svnapot && (pte & PTE_N)) { in get_physical_address()
221 if (!riscv_cpu_cfg(env)->mmu) { in hmp_info_mem()
333 if (riscv_cpu_cfg(env)->pmp && in helper_mret()
568 static inline const RISCVCPUConfig *riscv_cpu_cfg(CPURISCVState *env) in riscv_cpu_cfg() function
561 uint32_t vlenb = riscv_cpu_cfg(env)->vlen >> 3; in GEN_VEXT_LDFF()932 uint32_t total_elems = riscv_cpu_cfg(env)->vlen; \970 uint32_t total_elems = riscv_cpu_cfg(env)->vlen; \1174 uint32_t total_elems = riscv_cpu_cfg(env)->vlen; \1239 uint32_t total_elems = riscv_cpu_cfg(env)->vlen; \3974 uint32_t total_elems = riscv_cpu_cfg(env)->vlen; \ in RVVCALL()4014 uint32_t total_elems = riscv_cpu_cfg(env)->vlen; \4531 uint32_t total_elems = riscv_cpu_cfg(env)->vlen; \ in GEN_VEXT_FRED()4618 uint32_t total_elems = riscv_cpu_cfg(env)->vlen; in vmsetm()
902 if (riscv_cpu_cfg(env)->ext_smepmp) { in riscv_cpu_reset_hold()
14 const RISCVCPUConfig *cfg = riscv_cpu_cfg((CPURISCVState *) cpu_env); in open_cpuinfo()
8822 const RISCVCPUConfig *cfg = riscv_cpu_cfg(env); in risc_hwprobe_fill_pairs()