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Searched refs:rfshctl3 (Results 1 – 10 of 10) sorted by relevance

/openbmc/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c55 DDRCTL_REG_REG(rfshctl3),
339 setbits_le32(&ctl->rfshctl3, DDRCTRL_RFSHCTL3_DIS_AUTO_REFRESH); in stm32mp1_refresh_disable()
346 u32 rfshctl3, u32 pwrctl) in stm32mp1_refresh_restore() argument
349 if (!(rfshctl3 & DDRCTRL_RFSHCTL3_DIS_AUTO_REFRESH)) in stm32mp1_refresh_restore()
350 clrbits_le32(&ctl->rfshctl3, DDRCTRL_RFSHCTL3_DIS_AUTO_REFRESH); in stm32mp1_refresh_restore()
489 stm32mp1_refresh_restore(priv->ctl, config->c_reg.rfshctl3, in stm32mp1_ddr_init()
H A Dstm32mp1_ddr.h50 u32 rfshctl3; member
179 u32 rfshctl3,
H A Dstm32mp1_ddr_regs.h29 u32 rfshctl3; /* 0x60 Refresh Control 0*/ member
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun8i_a23.c220 writel(0x00000001, &mctl_ctl->rfshctl3); in mctl_init()
263 writel(0x00000000, &mctl_ctl->rfshctl3); in mctl_init()
H A Ddram_sun9i.c619 setbits_le32(&mctl_ctl->rfshctl3, MCTL_RFSHCTL3_DIS_AUTO_REFRESH); in mctl_channel_init()
731 setbits_le32(&mctl_ctl->rfshctl3, MCTL_RFSHCTL3_DIS_AUTO_REFRESH); in mctl_channel_init()
817 clrbits_le32(&mctl_ctl->rfshctl3, MCTL_RFSHCTL3_DIS_AUTO_REFRESH); in mctl_channel_init()
H A Ddram_sun50i_h6.c538 setbits_le32(&mctl_ctl->rfshctl3, BIT(0)); in mctl_channel_init()
670 clrbits_le32(&mctl_ctl->rfshctl3, BIT(0)); in mctl_channel_init()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sun9i.h56 u32 rfshctl3; /* 0x60 refresh control register 3 */ member
H A Ddram_sun50i_h6.h84 u32 rfshctl3; /* 0x060 */ member
H A Ddram_sun8i_a23.h108 u32 rfshctl3; /* 0x60 */ member
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dddr.h91 u32 rfshctl3; member