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Searched refs:reset_ctrl_reg (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/watchdog/
H A Dwdt_aspeed.c254 uint32_t reset_ctrl_reg = ASPEED_WDT_GET_CLASS(s)->reset_ctrl_reg; in aspeed_wdt_timer_expired() local
257 if (s->scu->regs[reset_ctrl_reg] & SCU_RESET_SDRAM) { in aspeed_wdt_timer_expired()
327 awc->reset_ctrl_reg = SCU_RESET_CONTROL1; in aspeed_2400_wdt_class_init()
364 awc->reset_ctrl_reg = SCU_RESET_CONTROL1; in aspeed_2500_wdt_class_init()
387 awc->reset_ctrl_reg = AST2600_SCU_RESET_CONTROL1; in aspeed_2600_wdt_class_init()
410 awc->reset_ctrl_reg = AST2600_SCU_RESET_CONTROL1; in aspeed_1030_wdt_class_init()
433 awc->reset_ctrl_reg = AST2600_SCU_RESET_CONTROL1; in aspeed_2700_wdt_class_init()
/openbmc/qemu/include/hw/watchdog/
H A Dwdt_aspeed.h46 uint32_t reset_ctrl_reg; member