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Searched refs:reset_bit (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/drivers/clk/aspeed/
H A Dclk_ast2500.c435 u32 reset_bit; in ast2500_configure_mac() local
467 reset_bit = BIT(ASPEED_RESET_MAC1); in ast2500_configure_mac()
471 reset_bit = BIT(ASPEED_RESET_MAC2); in ast2500_configure_mac()
486 setbits_le32(&scu->sysreset_ctrl1, reset_bit); in ast2500_configure_mac()
490 clrbits_le32(&scu->sysreset_ctrl1, reset_bit); in ast2500_configure_mac()
506 u32 reset_bit; in ast2500_enable_sdclk() local
509 reset_bit = BIT(ASEPPD_RESET_SDIO); in ast2500_enable_sdclk()
512 setbits_le32(&scu->sysreset_ctrl1, reset_bit); in ast2500_enable_sdclk()
517 clrbits_le32(&scu->sysreset_ctrl1, reset_bit); in ast2500_enable_sdclk()
546 u32 reset_bit; in ast2500_enable_usbahclk() local
[all …]
H A Dclk_ast2600.c1221 u32 reset_bit; in ast2600_configure_mac() local
1226 reset_bit = BIT(ASPEED_RESET_MAC1); in ast2600_configure_mac()
1228 writel(reset_bit, &scu->sysreset_ctrl1); in ast2600_configure_mac()
1232 writel(reset_bit, &scu->sysreset_clr_ctrl1); in ast2600_configure_mac()
1235 reset_bit = BIT(ASPEED_RESET_MAC2); in ast2600_configure_mac()
1237 writel(reset_bit, &scu->sysreset_ctrl1); in ast2600_configure_mac()
1241 writel(reset_bit, &scu->sysreset_clr_ctrl1); in ast2600_configure_mac()
1244 reset_bit = BIT(ASPEED_RESET_MAC3 - 32); in ast2600_configure_mac()
1246 writel(reset_bit, &scu->sysreset_ctrl2); in ast2600_configure_mac()
1250 writel(reset_bit, &scu->sysreset_clr_ctrl2); in ast2600_configure_mac()
[all …]
H A Dclk_ast2400.c401 u32 reset_bit; in ast2400_configure_mac() local
406 reset_bit = BIT(ASPEED_RESET_MAC1); in ast2400_configure_mac()
410 reset_bit = BIT(ASPEED_RESET_MAC2); in ast2400_configure_mac()
422 setbits_le32(&scu->sysreset_ctrl1, reset_bit); in ast2400_configure_mac()
426 clrbits_le32(&scu->sysreset_ctrl1, reset_bit); in ast2400_configure_mac()
434 u32 reset_bit; in ast2400_enable_sdclk() local
437 reset_bit = BIT(ASEPPD_RESET_SDIO); in ast2400_enable_sdclk()
440 setbits_le32(&scu->sysreset_ctrl1, reset_bit); in ast2400_enable_sdclk()
445 clrbits_le32(&scu->sysreset_ctrl1, reset_bit); in ast2400_enable_sdclk()
/openbmc/u-boot/arch/arm/mach-aspeed/ast2600/
H A Dboard_common.c165 u32 reset_bit; in aspeed_mmc_init() local
194 reset_bit = BIT(16); in aspeed_mmc_init()
196 writel(reset_bit, 0x1e6e2040); in aspeed_mmc_init()
200 writel(reset_bit, 0x1e6e2044); in aspeed_mmc_init()
/openbmc/u-boot/drivers/reset/
H A Dsti-reset.c39 int reset_bit; member
70 .reset_bit = _rb, \
77 .reset_bit = _rb, }
260 generic_set_bit(ch->reset_bit, reg); in sti_reset_program_hw()
262 generic_clear_bit(ch->reset_bit, reg); in sti_reset_program_hw()
/openbmc/qemu/hw/misc/
H A Dimx7_src.c131 uint32_t reset_bit; member
141 s->regs[SRC_A7RCR0] = deposit32(s->regs[SRC_A7RCR0], ri->reset_bit, 1, 0); in imx7_clear_reset_bit()
161 ri->reset_bit = reset_shift; in imx7_defer_clear_reset_bit()
H A Dimx6_src.c115 int reset_bit; member
125 s->regs[SRC_SCR] = deposit32(s->regs[SRC_SCR], ri->reset_bit, 1, 0); in imx6_clear_reset_bit()
144 ri->reset_bit = reset_shift; in imx6_defer_clear_reset_bit()