Home
last modified time | relevance | path

Searched refs:reset_base (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/hw/misc/
H A Dmips_cmgcr.c105 return current_vps->reset_base; in gcr_read()
107 return other_vps->reset_base; in gcr_read()
123 return (int32_t)(vps->reset_base & GCR_CL_RESET_BASE_RESETBASE_MSK); in get_exception_base()
144 current_vps->reset_base = data & GCR_CL_RESET_BASE_MSK; in gcr_write()
149 other_vps->reset_base = data & GCR_CL_RESET_BASE_MSK; in gcr_write()
199 s->vps[i].reset_base = 0xBFC00000 & GCR_CL_RESET_BASE_MSK; in mips_gcr_reset()
/openbmc/u-boot/board/imgtec/malta/
H A Dmalta.c126 void __iomem *reset_base; in _machine_restart() local
128 reset_base = (void __iomem *)CKSEG1ADDR(MALTA_RESET_BASE); in _machine_restart()
129 __raw_writel(GORESET, reset_base); in _machine_restart()
/openbmc/qemu/include/hw/misc/
H A Dmips_cmgcr.h71 uint64_t reset_base; member
/openbmc/linux/arch/mips/include/asm/
H A Dmips-cm.h316 GCR_CX_ACCESSOR_RW(32, 0x020, reset_base)