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Searched refs:regs (Results 1 – 25 of 883) sorted by relevance

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/openbmc/u-boot/board/cavium/thunderx/
H A Datf.c20 struct pt_regs regs; in atf_read_mmc() local
21 regs.regs[0] = THUNDERX_MMC_READ; in atf_read_mmc()
22 regs.regs[1] = offset; in atf_read_mmc()
23 regs.regs[2] = size; in atf_read_mmc()
24 regs.regs[3] = (uintptr_t)buffer; in atf_read_mmc()
26 smc_call(&regs); in atf_read_mmc()
28 return regs.regs[0]; in atf_read_mmc()
33 struct pt_regs regs; in atf_read_nor() local
34 regs.regs[0] = THUNDERX_NOR_READ; in atf_read_nor()
35 regs.regs[1] = offset; in atf_read_nor()
[all …]
/openbmc/u-boot/arch/nds32/lib/
H A Dinterrupts.c70 void show_regs(struct pt_regs *regs) in show_regs() argument
77 regs->ipc, regs->sp, regs->lp, regs->gp, regs->fp); in show_regs()
79 regs->d1hi, regs->d1lo, regs->d0hi, regs->d0lo); in show_regs()
81 regs->p1, regs->p0, regs->r[25], regs->r[24]); in show_regs()
83 regs->r[23], regs->r[22], regs->r[21], regs->r[20]); in show_regs()
85 regs->r[19], regs->r[18], regs->r[17], regs->r[16]); in show_regs()
87 regs->r[15], regs->r[14], regs->r[13], regs->r[12]); in show_regs()
89 regs->r[11], regs->r[10], regs->r[9], regs->r[8]); in show_regs()
91 regs->r[7], regs->r[6], regs->r[5], regs->r[4]); in show_regs()
93 regs->r[3], regs->r[2], regs->r[1], regs->r[0]); in show_regs()
[all …]
/openbmc/u-boot/arch/powerpc/cpu/mpc8xx/
H A Dtraps.c54 static void show_regs(struct pt_regs *regs) in show_regs() argument
59 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar); in show_regs()
61 regs->msr, regs->msr & MSR_EE ? 1 : 0, in show_regs()
62 regs->msr & MSR_PR ? 1 : 0, regs->msr & MSR_FP ? 1 : 0, in show_regs()
63 regs->msr & MSR_ME ? 1 : 0, regs->msr & MSR_IR ? 1 : 0, in show_regs()
64 regs->msr & MSR_DR ? 1 : 0); in show_regs()
71 printf("%08lX ", regs->gpr[i]); in show_regs()
78 static void _exception(int signr, struct pt_regs *regs) in _exception() argument
80 show_regs(regs); in _exception()
81 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
[all …]
/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dtraps.c51 void show_regs(struct pt_regs *regs) in show_regs() argument
56 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar); in show_regs()
58 regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0, in show_regs()
59 regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0, in show_regs()
60 regs->msr&MSR_IR ? 1 : 0, in show_regs()
61 regs->msr&MSR_DR ? 1 : 0); in show_regs()
69 printf("%08lX ", regs->gpr[i]); in show_regs()
77 static void _exception(int signr, struct pt_regs *regs) in _exception() argument
79 show_regs(regs); in _exception()
80 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
[all …]
/openbmc/u-boot/arch/powerpc/cpu/mpc86xx/
H A Dtraps.c58 void show_regs(struct pt_regs *regs) in show_regs() argument
64 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar); in show_regs()
67 regs->msr, regs->msr & MSR_EE ? 1 : 0, in show_regs()
68 regs->msr & MSR_PR ? 1 : 0, regs->msr & MSR_FP ? 1 : 0, in show_regs()
69 regs->msr & MSR_ME ? 1 : 0, regs->msr & MSR_IR ? 1 : 0, in show_regs()
70 regs->msr & MSR_DR ? 1 : 0); in show_regs()
78 printf("%08lX ", regs->gpr[i]); in show_regs()
86 static void _exception(int signr, struct pt_regs *regs) in _exception() argument
88 show_regs(regs); in _exception()
89 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
[all …]
/openbmc/u-boot/arch/arc/lib/
H A Dinterrupts.c61 void show_regs(struct pt_regs *regs) in show_regs() argument
63 printf("ECR:\t0x%08lx\n", regs->ecr); in show_regs()
65 regs->ret, regs->blink, regs->status32); in show_regs()
66 printf("GP: 0x%08lx\t r25: 0x%08lx\t\n", regs->r26, regs->r25); in show_regs()
67 printf("BTA: 0x%08lx\t SP: 0x%08lx\t FP: 0x%08lx\n", regs->bta, in show_regs()
68 regs->sp, regs->fp); in show_regs()
69 printf("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n", regs->lp_start, in show_regs()
70 regs->lp_end, regs->lp_count); in show_regs()
72 print_reg_file(&(regs->r0), 0); in show_regs()
75 void bad_mode(struct pt_regs *regs) in bad_mode() argument
[all …]
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dtraps.c87 void show_regs(struct pt_regs *regs) in show_regs() argument
92 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar); in show_regs()
94 regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0, in show_regs()
95 regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0, in show_regs()
96 regs->msr&MSR_IR ? 1 : 0, in show_regs()
97 regs->msr&MSR_DR ? 1 : 0); in show_regs()
106 printf("%08lX ", regs->gpr[i]); in show_regs()
115 static void _exception(int signr, struct pt_regs *regs) in _exception() argument
117 show_regs(regs); in _exception()
118 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
[all …]
/openbmc/qemu/bsd-user/x86_64/
H A Dtarget_arch_reg.h61 static inline void target_copy_regs(target_reg_t *regs, const CPUX86State *env) in target_copy_regs() argument
64 regs->r_r15 = env->regs[15]; in target_copy_regs()
65 regs->r_r14 = env->regs[14]; in target_copy_regs()
66 regs->r_r13 = env->regs[13]; in target_copy_regs()
67 regs->r_r12 = env->regs[12]; in target_copy_regs()
68 regs->r_r11 = env->regs[11]; in target_copy_regs()
69 regs->r_r10 = env->regs[10]; in target_copy_regs()
70 regs->r_r9 = env->regs[9]; in target_copy_regs()
71 regs->r_r8 = env->regs[8]; in target_copy_regs()
72 regs->r_rdi = env->regs[R_EDI]; in target_copy_regs()
[all …]
/openbmc/qemu/hw/misc/
H A Daxp2xx.c50 uint8_t regs[NR_REGS]; /* peripheral registers */ member
68 memset(s->regs, 0, NR_REGS); in axp209_reset_enter()
72 s->regs[0x03] = AXP209_CHIP_VERSION_ID; in axp209_reset_enter()
73 s->regs[0x23] = AXP209_DC_DC2_OUT_V_CTRL_RESET; in axp209_reset_enter()
75 s->regs[0x30] = 0x60; in axp209_reset_enter()
76 s->regs[0x32] = 0x46; in axp209_reset_enter()
77 s->regs[0x34] = 0x41; in axp209_reset_enter()
78 s->regs[0x35] = 0x22; in axp209_reset_enter()
79 s->regs[0x36] = 0x5d; in axp209_reset_enter()
80 s->regs[0x37] = 0x08; in axp209_reset_enter()
[all …]
/openbmc/u-boot/arch/arm/cpu/armv8/
H A Dfwcall.c37 : "+m" (args->regs[0]), "+m" (args->regs[1]), in hvc_call()
38 "+m" (args->regs[2]), "+m" (args->regs[3]) in hvc_call()
39 : "m" (args->regs[4]), "m" (args->regs[5]), in hvc_call()
40 "m" (args->regs[6]), "m" (args->regs[7]) in hvc_call()
70 : "+m" (args->regs[0]), "+m" (args->regs[1]), in smc_call()
71 "+m" (args->regs[2]), "+m" (args->regs[3]) in smc_call()
72 : "m" (args->regs[4]), "m" (args->regs[5]), in smc_call()
73 "m" (args->regs[6]) in smc_call()
89 struct pt_regs regs; in psci_system_reset() local
91 regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_RESET; in psci_system_reset()
[all …]
/openbmc/u-boot/arch/arm/mach-meson/
H A Dsm.c21 struct pt_regs regs; in meson_init_shmem() local
26 regs.regs[0] = FN_GET_SHARE_MEM_INPUT_BASE; in meson_init_shmem()
27 smc_call(&regs); in meson_init_shmem()
28 shmem_input = (void *)regs.regs[0]; in meson_init_shmem()
30 regs.regs[0] = FN_GET_SHARE_MEM_OUTPUT_BASE; in meson_init_shmem()
31 smc_call(&regs); in meson_init_shmem()
32 shmem_output = (void *)regs.regs[0]; in meson_init_shmem()
39 struct pt_regs regs; in meson_sm_read_efuse() local
43 regs.regs[0] = FN_EFUSE_READ; in meson_sm_read_efuse()
44 regs.regs[1] = offset; in meson_sm_read_efuse()
[all …]
/openbmc/qemu/tests/tcg/i386/
H A Dtest-avx.py249 regs = (10, 11, 12)
272 (dest, ireg | 0, regs[0]),
273 (dest, ireg | 1, regs[0]),
274 (dest, ireg | 2, regs[0]),
275 (dest, ireg | 3, regs[0]),
280 regset = [(regs[0],)]
285 (regs[0], regs[1]),
286 (regs[0], regs[0]),
289 regset += [(-1, regs[0])]
294 (dest, regs[0], regs[1]),
[all …]
/openbmc/qemu/bsd-user/riscv/
H A Dsignal.c28 set_sigtramp_args(CPURISCVState *regs, int sig, struct target_sigframe *frame, in set_sigtramp_args() argument
41 regs->gpr[xA0] = sig; in set_sigtramp_args()
42 regs->gpr[xA1] = frame_addr + in set_sigtramp_args()
44 regs->gpr[xA2] = frame_addr + in set_sigtramp_args()
46 regs->pc = ka->_sa_handler; in set_sigtramp_args()
47 regs->gpr[xSP] = frame_addr; in set_sigtramp_args()
48 regs->gpr[xRA] = TARGET_PS_STRINGS - TARGET_SZSIGCODE; in set_sigtramp_args()
69 abi_long get_mcontext(CPURISCVState *regs, target_mcontext_t *mcp, in get_mcontext() argument
73 mcp->mc_gpregs.gp_t[0] = tswap64(regs->gpr[5]); in get_mcontext()
74 mcp->mc_gpregs.gp_t[1] = tswap64(regs->gpr[6]); in get_mcontext()
[all …]
H A Dtarget_arch_reg.h44 static inline void target_copy_regs(target_reg_t *regs, in target_copy_regs() argument
48 regs->ra = tswapreg(env->gpr[1]); in target_copy_regs()
49 regs->sp = tswapreg(env->gpr[2]); in target_copy_regs()
50 regs->gp = tswapreg(env->gpr[3]); in target_copy_regs()
51 regs->tp = tswapreg(env->gpr[4]); in target_copy_regs()
53 regs->t[0] = tswapreg(env->gpr[5]); in target_copy_regs()
54 regs->t[1] = tswapreg(env->gpr[6]); in target_copy_regs()
55 regs->t[2] = tswapreg(env->gpr[7]); in target_copy_regs()
56 regs->t[3] = tswapreg(env->gpr[28]); in target_copy_regs()
57 regs->t[4] = tswapreg(env->gpr[29]); in target_copy_regs()
[all …]
/openbmc/qemu/hw/display/
H A Dati_2d.c29 switch (s->regs.dp_datatype & 0xf) { in ati_bpp_from_datatype()
41 s->regs.dp_datatype & 0xf); in ati_bpp_from_datatype()
46 #define DEFAULT_CNTL (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CNTL)
56 (s->regs.dp_mix & GMC_ROP3_MASK) >> 16); in ati_2d_blt()
57 unsigned dst_x = (s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT ? in ati_2d_blt()
58 s->regs.dst_x : s->regs.dst_x + 1 - s->regs.dst_width); in ati_2d_blt()
59 unsigned dst_y = (s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM ? in ati_2d_blt()
60 s->regs.dst_y : s->regs.dst_y + 1 - s->regs.dst_height); in ati_2d_blt()
66 int dst_stride = DEFAULT_CNTL ? s->regs.dst_pitch : s->regs.default_pitch; in ati_2d_blt()
72 s->regs.dst_offset : s->regs.default_offset); in ati_2d_blt()
[all …]
H A Dati.c55 s->mode, !!(s->regs.crtc_gen_cntl & CRTC2_EXT_DISP_EN)); in ati_vga_switch_mode()
56 if (s->regs.crtc_gen_cntl & CRTC2_EXT_DISP_EN) { in ati_vga_switch_mode()
59 if (s->regs.crtc_gen_cntl & CRTC2_EN) { in ati_vga_switch_mode()
62 uint32_t offs = s->regs.crtc_offset & 0x07ffffff; in ati_vga_switch_mode()
63 int stride = (s->regs.crtc_pitch & 0x7ff) * 8; in ati_vga_switch_mode()
67 if (s->regs.crtc_h_total_disp == 0) { in ati_vga_switch_mode()
68 s->regs.crtc_h_total_disp = ((640 / 8) - 1) << 16; in ati_vga_switch_mode()
70 if (s->regs.crtc_v_total_disp == 0) { in ati_vga_switch_mode()
71 s->regs.crtc_v_total_disp = (480 - 1) << 16; in ati_vga_switch_mode()
73 h = ((s->regs.crtc_h_total_disp >> 16) + 1) * 8; in ati_vga_switch_mode()
[all …]
/openbmc/u-boot/drivers/video/rockchip/
H A Drk_mipi.c52 static void rk_mipi_dsi_write(uintptr_t regs, u32 reg, u32 val) in rk_mipi_dsi_write() argument
58 uintptr_t addr = (reg >> ADDR_SHIFT) + regs; in rk_mipi_dsi_write()
84 uintptr_t regs = priv->regs; in rk_mipi_dsi_enable() local
91 rk_mipi_dsi_write(regs, VID_HSA_TIME, timing->hsync_len.typ); in rk_mipi_dsi_enable()
92 rk_mipi_dsi_write(regs, VID_HBP_TIME, timing->hback_porch.typ); in rk_mipi_dsi_enable()
93 rk_mipi_dsi_write(regs, VID_HLINE_TIME, (timing->hsync_len.typ in rk_mipi_dsi_enable()
96 rk_mipi_dsi_write(regs, VID_VSA_LINES, timing->vsync_len.typ); in rk_mipi_dsi_enable()
97 rk_mipi_dsi_write(regs, VID_VBP_LINES, timing->vback_porch.typ); in rk_mipi_dsi_enable()
98 rk_mipi_dsi_write(regs, VID_VFP_LINES, timing->vfront_porch.typ); in rk_mipi_dsi_enable()
99 rk_mipi_dsi_write(regs, VID_ACTIVE_LINES, timing->vactive.typ); in rk_mipi_dsi_enable()
[all …]
/openbmc/u-boot/arch/riscv/include/asm/
H A Dptrace.h57 #define user_mode(regs) (((regs)->sstatus & SR_PS) == 0) argument
60 #define GET_IP(regs) ((regs)->sepc) argument
61 #define SET_IP(regs, val) (GET_IP(regs) = (val)) argument
63 static inline unsigned long instruction_pointer(struct pt_regs *regs) in instruction_pointer() argument
65 return GET_IP(regs); in instruction_pointer()
68 static inline void instruction_pointer_set(struct pt_regs *regs, ulong val) in instruction_pointer_set() argument
70 SET_IP(regs, val); in instruction_pointer_set()
73 #define profile_pc(regs) instruction_pointer(regs) argument
76 #define GET_USP(regs) ((regs)->sp) argument
77 #define SET_USP(regs, val) (GET_USP(regs) = (val)) argument
[all …]
/openbmc/u-boot/arch/mips/lib/
H A Dasm-offsets.c20 OFFSET(PT_R0, pt_regs, regs[0]); in output_ptreg_defines()
21 OFFSET(PT_R1, pt_regs, regs[1]); in output_ptreg_defines()
22 OFFSET(PT_R2, pt_regs, regs[2]); in output_ptreg_defines()
23 OFFSET(PT_R3, pt_regs, regs[3]); in output_ptreg_defines()
24 OFFSET(PT_R4, pt_regs, regs[4]); in output_ptreg_defines()
25 OFFSET(PT_R5, pt_regs, regs[5]); in output_ptreg_defines()
26 OFFSET(PT_R6, pt_regs, regs[6]); in output_ptreg_defines()
27 OFFSET(PT_R7, pt_regs, regs[7]); in output_ptreg_defines()
28 OFFSET(PT_R8, pt_regs, regs[8]); in output_ptreg_defines()
29 OFFSET(PT_R9, pt_regs, regs[9]); in output_ptreg_defines()
[all …]
/openbmc/u-boot/drivers/ddr/fsl/
H A Darm_ddr_gen3.c30 void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, in fsl_ddr_set_memctl_regs() argument
66 if (regs->ddr_eor) in fsl_ddr_set_memctl_regs()
67 ddr_out32(&ddr->eor, regs->ddr_eor); in fsl_ddr_set_memctl_regs()
70 ddr_out32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
71 ddr_out32(&ddr->cs0_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
72 ddr_out32(&ddr->cs0_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs()
75 ddr_out32(&ddr->cs1_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
76 ddr_out32(&ddr->cs1_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
77 ddr_out32(&ddr->cs1_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs()
80 ddr_out32(&ddr->cs2_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
[all …]
/openbmc/u-boot/drivers/video/
H A Dbroadwell_igd.c23 u8 *regs; member
71 u8 *regs = priv->regs; in haswell_early_init() local
75 writel(0x00000020, regs + 0xa180); in haswell_early_init()
76 writel(0x00010001, regs + 0xa188); in haswell_early_init()
77 ret = poll32(regs + 0x130044, 1, 1); in haswell_early_init()
82 setbits_le32(regs + 0xa248, 0x00000016); in haswell_early_init()
85 writel(0x00070020, regs + 0xa000); in haswell_early_init()
88 clrsetbits_le32(regs + 0xa180, ~0xff3fffff, 0x15000000); in haswell_early_init()
91 writel(0x000003fd, regs + 0x9424); in haswell_early_init()
94 writel(0x00000080, regs + 0x9400); in haswell_early_init()
[all …]
/openbmc/u-boot/drivers/spmi/
H A Dspmi-sandbox.c59 struct sandbox_emul_fake_regs *regs; in sandbox_spmi_write() local
64 regs = priv->gpios[pid & 0x3].r; /* Last 3 bits of pid are gpio # */ in sandbox_spmi_write()
68 val &= regs[off].access_mask; in sandbox_spmi_write()
71 regs[0x8].value &= ~0x1; in sandbox_spmi_write()
72 regs[0x8].value |= val & 0x1; in sandbox_spmi_write()
76 if (regs[off].perms & EMUL_PERM_W) in sandbox_spmi_write()
77 regs[off].value = val & regs[off].access_mask; in sandbox_spmi_write()
85 struct sandbox_emul_fake_regs *regs; in sandbox_spmi_read() local
90 regs = priv->gpios[pid & 0x3].r; /* Last 3 bits of pid are gpio # */ in sandbox_spmi_read()
92 if (regs[0x46].value == 0) /* Block disabled */ in sandbox_spmi_read()
[all …]
/openbmc/qemu/hw/pci-host/
H A Dgt64120.c256 uint32_t regs[GT_REGS]; member
305 hwaddr start = ((hwaddr)s->regs[GT_ISD] << 21) & 0xFFFE00000ull; in gt64120_isd_mapping()
329 if ((s->regs[GT_PCI0IOLD] & 0x7f) <= s->regs[GT_PCI0IOHD]) { in gt64120_pci_mapping()
336 s->PCI0IO_start = s->regs[GT_PCI0IOLD] << 21; in gt64120_pci_mapping()
337 s->PCI0IO_length = ((s->regs[GT_PCI0IOHD] + 1) - in gt64120_pci_mapping()
338 (s->regs[GT_PCI0IOLD] & 0x7f)) << 21; in gt64120_pci_mapping()
348 if ((s->regs[GT_PCI0M0LD] & 0x7f) <= s->regs[GT_PCI0M0HD]) { in gt64120_pci_mapping()
355 s->PCI0M0_start = s->regs[GT_PCI0M0LD] << 21; in gt64120_pci_mapping()
356 s->PCI0M0_length = ((s->regs[GT_PCI0M0HD] + 1) - in gt64120_pci_mapping()
357 (s->regs[GT_PCI0M0LD] & 0x7f)) << 21; in gt64120_pci_mapping()
[all …]
/openbmc/qemu/hw/net/
H A Ddp8393x.c152 return (s->regs[SONIC_URRA] << 16) | s->regs[SONIC_CDP]; in dp8393x_cdp()
157 return (s->regs[SONIC_CRBA1] << 16) | s->regs[SONIC_CRBA0]; in dp8393x_crba()
162 return (s->regs[SONIC_URDA] << 16) | in dp8393x_crda()
163 (s->regs[SONIC_CRDA] & SONIC_DESC_ADDR); in dp8393x_crda()
168 return (s->regs[SONIC_RBWC1] << 16) | s->regs[SONIC_RBWC0]; in dp8393x_rbwc()
173 return (s->regs[SONIC_URRA] << 16) | s->regs[SONIC_RRP]; in dp8393x_rrp()
178 return (s->regs[SONIC_TSA1] << 16) | s->regs[SONIC_TSA0]; in dp8393x_tsa()
183 return (s->regs[SONIC_UTDA] << 16) | in dp8393x_ttda()
184 (s->regs[SONIC_TTDA] & SONIC_DESC_ADDR); in dp8393x_ttda()
189 return s->regs[SONIC_WT1] << 16 | s->regs[SONIC_WT0]; in dp8393x_wt()
[all …]
/openbmc/u-boot/drivers/misc/
H A Dmxc_ocotp.c157 static void wait_busy(struct ocotp_regs *regs, unsigned int delay_us) in wait_busy() argument
159 while (readl(&regs->ctrl) & BM_CTRL_BUSY) in wait_busy()
163 static void clear_error(struct ocotp_regs *regs) in clear_error() argument
165 writel(BM_CTRL_ERROR, &regs->ctrl_clr); in clear_error()
168 static int prepare_access(struct ocotp_regs **regs, u32 bank, u32 word, in prepare_access() argument
171 *regs = (struct ocotp_regs *)OCOTP_BASE_ADDR; in prepare_access()
174 word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 2 || in prepare_access()
182 word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 3) { in prepare_access()
190 wait_busy(*regs, 1); in prepare_access()
191 clear_error(*regs); in prepare_access()
[all …]

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