| /openbmc/u-boot/test/dm/ |
| H A D | pmic.c | 64 int reg_count, i; in dm_test_power_pmic_io() local
68 reg_count = pmic_reg_count(dev); in dm_test_power_pmic_io()
69 ut_asserteq(reg_count, SANDBOX_PMIC_REG_COUNT); in dm_test_power_pmic_io()
76 for (i = 0; i < reg_count; i++) { in dm_test_power_pmic_io()
92 int reg_count; in dm_test_power_pmic_mc34708_regs_check() local
97 reg_count = pmic_reg_count(dev); in dm_test_power_pmic_mc34708_regs_check()
98 ut_asserteq(reg_count, MC34708_PMIC_REG_COUNT); in dm_test_power_pmic_mc34708_regs_check()
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| /openbmc/qemu/hw/timer/ |
| H A D | cadence_ttc.c | 129 if (s->reg_count & COUNTER_CTRL_DIS) { in cadence_timer_run()
135 int64_t interval = (uint64_t)((s->reg_count & COUNTER_CTRL_INT) ? in cadence_timer_run()
137 next_value = (s->reg_count & COUNTER_CTRL_DEC) ? -1ULL : interval; in cadence_timer_run()
159 int64_t interval = ((s->reg_count & COUNTER_CTRL_INT) ? in cadence_timer_sync()
172 x = (int64_t)s->reg_value + ((s->reg_count & COUNTER_CTRL_DEC) ? -r : r); in cadence_timer_sync()
188 s->reg_intr |= (s->reg_count & COUNTER_CTRL_INT) ? in cadence_timer_sync()
224 return s->reg_count; in cadence_ttc_read_imp()
311 s->reg_count = value & 0x3f & ~COUNTER_CTRL_RST; in cadence_ttc_write()
371 s->reg_count = 0x21; in cadence_timer_reset()
430 VMSTATE_UINT32(reg_count, CadenceTimerState),
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| /openbmc/u-boot/drivers/power/pmic/ |
| H A D | i2c_pmic_emul.c | 22 u8 reg_count; member
35 plat->reg_count); in sandbox_i2c_pmic_read_data()
73 plat->reg_count); in sandbox_i2c_pmic_write_data()
112 plat->reg_count = pmic_reg_count(pmic_dev); in sandbox_i2c_pmic_ofdata_to_platdata()
114 plat->buf_size = plat->reg_count * plat->trans_len; in sandbox_i2c_pmic_ofdata_to_platdata()
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| H A D | rn5t567.c | 48 .reg_count = rn5t567_reg_count,
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| H A D | max8997.c | 43 .reg_count = max8997_reg_count,
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| H A D | max8998.c | 43 .reg_count = max8998_reg_count,
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| H A D | sandbox.c | 60 .reg_count = sandbox_pmic_reg_count,
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| H A D | fan53555.c | 66 .reg_count = pmic_fan53555_reg_count,
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| H A D | pmic-uclass.c | 99 if (!ops || !ops->reg_count) in pmic_reg_count()
102 return ops->reg_count(dev); in pmic_reg_count()
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| H A D | act8846.c | 69 .reg_count = act8846_reg_count,
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| H A D | max77686.c | 71 .reg_count = max77686_reg_count,
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| H A D | tps65090.c | 73 .reg_count = tps65090_reg_count,
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| H A D | s2mps11.c | 71 .reg_count = s2mps11_reg_count,
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| H A D | s5m8767.c | 75 .reg_count = s5m8767_reg_count,
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| H A D | pm8916.c | 56 .reg_count = pm8916_reg_count,
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| H A D | pfuze100.c | 74 .reg_count = pfuze100_reg_count,
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| H A D | stpmu1.c | 79 .reg_count = stpmu1_reg_count,
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| H A D | pmic_tps65910_dm.c | 78 .reg_count = pmic_tps65910_reg_count,
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| H A D | mc34708.c | 89 .reg_count = mc34708_reg_count,
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| H A D | rk8xx.c | 91 .reg_count = rk8xx_reg_count,
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| H A D | as3722.c | 158 .reg_count = as3722_reg_count,
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| /openbmc/u-boot/tools/ |
| H A D | zynqimage.c | 235 unsigned int reg_count = 0; in zynqimage_parse_initparams() local
260 zynqhdr->register_init[reg_count] = reginit; in zynqimage_parse_initparams()
261 ++reg_count; in zynqimage_parse_initparams()
264 } while ((r != EOF) && (reg_count < HEADER_REGINITS)); in zynqimage_parse_initparams()
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| H A D | zynqmpimage.c | 370 unsigned int reg_count = 0; in zynqmpimage_parse_initparams() local
395 zynqhdr->register_init[reg_count] = reginit; in zynqmpimage_parse_initparams()
396 ++reg_count; in zynqmpimage_parse_initparams()
399 } while ((r != EOF) && (reg_count < HEADER_REGINITS)); in zynqmpimage_parse_initparams()
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| /openbmc/qemu/include/hw/timer/ |
| H A D | cadence_ttc.h | 29 uint32_t reg_count; member
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| /openbmc/u-boot/include/power/ |
| H A D | pmic.h | 163 int (*reg_count)(struct udevice *dev); member
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