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Searched refs:reg_block (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dppatomctrl.c49 ATOM_INIT_REG_BLOCK *reg_block, in atomctrl_retrieve_ac_timing() argument
55 ((uint8_t *)reg_block + (2 * sizeof(uint16_t)) + le16_to_cpu(reg_block->usRegIndexTblSize)); in atomctrl_retrieve_ac_timing()
103 ATOM_INIT_REG_BLOCK *reg_block, in atomctrl_set_mc_reg_address_table() argument
139 ATOM_INIT_REG_BLOCK *reg_block; in atomctrl_initialize_mc_reg_table() local
157 reg_block = (ATOM_INIT_REG_BLOCK *) in atomctrl_initialize_mc_reg_table()
159 result = atomctrl_set_mc_reg_address_table(reg_block, table); in atomctrl_initialize_mc_reg_table()
164 reg_block, table); in atomctrl_initialize_mc_reg_table()
176 ATOM_INIT_REG_BLOCK *reg_block; in atomctrl_initialize_mc_reg_table_v2_2() local
194 reg_block = (ATOM_INIT_REG_BLOCK *) in atomctrl_initialize_mc_reg_table_v2_2()
196 result = atomctrl_set_mc_reg_address_table(reg_block, table); in atomctrl_initialize_mc_reg_table_v2_2()
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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v8_0.c2886 u32 reg_block, lb_interrupt_mask; in dce_v8_0_set_crtc_vblank_interrupt_state() local
2895 reg_block = CRTC0_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2898 reg_block = CRTC1_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2901 reg_block = CRTC2_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2904 reg_block = CRTC3_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2907 reg_block = CRTC4_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2910 reg_block = CRTC5_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2937 u32 reg_block, lb_interrupt_mask; in dce_v8_0_set_crtc_vline_interrupt_state() local
2946 reg_block = CRTC0_REGISTER_OFFSET; in dce_v8_0_set_crtc_vline_interrupt_state()
2949 reg_block = CRTC1_REGISTER_OFFSET; in dce_v8_0_set_crtc_vline_interrupt_state()
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H A Datom.h142 uint16_t reg_block; member
H A Datom.c194 idx += gctx->reg_block; in atom_get_src_int()
261 val = gctx->reg_block; in atom_get_src_int()
466 idx += gctx->reg_block; in atom_put_dst()
528 gctx->reg_block = val; in atom_put_dst()
918 ctx->ctx->reg_block = U16(*ptr); in atom_op_setregblock()
920 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); in atom_op_setregblock()
1276 ctx->reg_block = 0; in amdgpu_atom_execute_table()
H A Ddce_v6_0.c2842 u32 reg_block, interrupt_mask; in dce_v6_0_set_crtc_vblank_interrupt_state() local
2851 reg_block = SI_CRTC0_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2854 reg_block = SI_CRTC1_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2857 reg_block = SI_CRTC2_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2860 reg_block = SI_CRTC3_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2863 reg_block = SI_CRTC4_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2866 reg_block = SI_CRTC5_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2875 interrupt_mask = RREG32(mmINT_MASK + reg_block); in dce_v6_0_set_crtc_vblank_interrupt_state()
2877 WREG32(mmINT_MASK + reg_block, interrupt_mask); in dce_v6_0_set_crtc_vblank_interrupt_state()
2880 interrupt_mask = RREG32(mmINT_MASK + reg_block); in dce_v6_0_set_crtc_vblank_interrupt_state()
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H A Damdgpu_atombios.c1441 ATOM_INIT_REG_BLOCK *reg_block = in amdgpu_atombios_init_mc_reg_table() local
1446 ((u8 *)reg_block + (2 * sizeof(u16)) + in amdgpu_atombios_init_mc_reg_table()
1447 le16_to_cpu(reg_block->usRegIndexTblSize)); in amdgpu_atombios_init_mc_reg_table()
1448 ATOM_INIT_REG_INDEX_FORMAT *format = &reg_block->asRegIndexBuf[0]; in amdgpu_atombios_init_mc_reg_table()
1449 num_entries = (u8)((le16_to_cpu(reg_block->usRegIndexTblSize)) / in amdgpu_atombios_init_mc_reg_table()
1488 ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); in amdgpu_atombios_init_mc_reg_table()
/openbmc/linux/drivers/gpu/drm/radeon/
H A Datom.c192 idx += gctx->reg_block; in atom_get_src_int()
259 val = gctx->reg_block; in atom_get_src_int()
464 idx += gctx->reg_block; in atom_put_dst()
526 gctx->reg_block = val; in atom_put_dst()
880 ctx->ctx->reg_block = U16(*ptr); in atom_op_setregblock()
882 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); in atom_op_setregblock()
1223 ctx->reg_block = 0; in atom_execute_table_scratch_unlocked()
H A Datom.h137 uint16_t reg_block; member
H A Dradeon_atombios.c4011 ATOM_INIT_REG_BLOCK *reg_block = in radeon_atom_init_mc_reg_table() local
4016 ((u8 *)reg_block + (2 * sizeof(u16)) + in radeon_atom_init_mc_reg_table()
4017 le16_to_cpu(reg_block->usRegIndexTblSize)); in radeon_atom_init_mc_reg_table()
4018 ATOM_INIT_REG_INDEX_FORMAT *format = &reg_block->asRegIndexBuf[0]; in radeon_atom_init_mc_reg_table()
4019 num_entries = (u8)((le16_to_cpu(reg_block->usRegIndexTblSize)) / in radeon_atom_init_mc_reg_table()
4056 ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); in radeon_atom_init_mc_reg_table()
/openbmc/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_common.c804 u32 reg_block = 0; in i40e_pre_tx_queue_cfg() local
808 reg_block = abs_queue_idx / 128; in i40e_pre_tx_queue_cfg()
812 reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_pre_tx_queue_cfg()
821 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val); in i40e_pre_tx_queue_cfg()
1124 u32 reg_block = 0; in i40e_clear_hw() local
1127 reg_block = abs_queue_idx / 128; in i40e_clear_hw()
1131 val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_clear_hw()
1136 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), val); in i40e_clear_hw()