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Searched refs:reg_a2w_ctrl (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/include/hw/misc/
H A Dbcm2835_cprman.h128 uint32_t *reg_a2w_ctrl; member
148 uint32_t *reg_a2w_ctrl; member
H A Dbcm2835_cprman_internals.h291 pll->reg_a2w_ctrl = &s->regs[PLL_INIT_INFO[id].a2w_ctrl_offset]; in set_pll_init_info()
411 channel->reg_a2w_ctrl = &s->regs[PLL_CHANNEL_INIT_INFO[id].a2w_ctrl_offset]; in set_pll_channel_init_info()
/openbmc/qemu/hw/misc/
H A Dbcm2835_cprman.c62 *s->reg_a2w_ctrl = info->a2w_ctrl; in pll_reset()
69 return !FIELD_EX32(*pll->reg_a2w_ctrl, A2W_PLLx_CTRL, PWRDN) in pll_is_locked()
82 pdiv = FIELD_EX32(*pll->reg_a2w_ctrl, A2W_PLLx_CTRL, PDIV); in pll_update()
89 ndiv = FIELD_EX32(*pll->reg_a2w_ctrl, A2W_PLLx_CTRL, NDIV); in pll_update()
158 *s->reg_a2w_ctrl = info->a2w_ctrl; in pll_channel_reset()
168 return !FIELD_EX32(*channel->reg_a2w_ctrl, A2W_PLLx_CHANNELy, DISABLE) in pll_channel_is_enabled()
181 div = FIELD_EX32(*channel->reg_a2w_ctrl, A2W_PLLx_CHANNELy, DIV); in pll_channel_update()