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Searched refs:regVPG4_VPG_MEM_PWR (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h11415 #define regVPG4_VPG_MEM_PWR … macro
H A Ddcn_3_1_5_offset.h11160 #define regVPG4_VPG_MEM_PWR … macro
H A Ddcn_3_1_4_offset.h10538 #define regVPG4_VPG_MEM_PWR … macro
H A Ddcn_3_2_1_offset.h10576 #define regVPG4_VPG_MEM_PWR … macro
H A Ddcn_3_2_0_offset.h10577 #define regVPG4_VPG_MEM_PWR … macro
H A Ddcn_3_1_6_offset.h11639 #define regVPG4_VPG_MEM_PWR … macro