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Searched refs:regVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32 (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfxhub_v1_2.c58 regVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v1_2_xcc_setup_vm_pt_regs()
541 regVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32); in gfxhub_v1_2_xcc_init()
H A Dmmhub_v1_8.c70 regVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v1_8_setup_vm_pt_regs()
527 regVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32); in mmhub_v1_8_init()
H A Dmmhub_v1_7.c62 WREG32_SOC15_OFFSET(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v1_7_setup_vm_pt_regs()
435 regVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32); in mmhub_v1_7_init()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_8_0_offset.h2876 #define regVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32 macro
H A Dmmhub_1_7_offset.h4754 #define regVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h7020 #define regVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32 macro
H A Dgc_9_4_3_offset.h1810 #define regVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32 macro