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Searched refs:regVCN_RAS_CNTL_MMSCH_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_4_0_0_offset.h1557 #define regVCN_RAS_CNTL_MMSCH_BASE_IDX … macro
H A Dvcn_4_0_3_offset.h1501 #define regVCN_RAS_CNTL_MMSCH_BASE_IDX … macro