Home
last modified time | relevance | path

Searched refs:regUVD_VCPU_NONCACHE_SIZE1_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_offset.h73 #define regUVD_VCPU_NONCACHE_SIZE1_BASE_IDX … macro
H A Dvcn_4_0_0_offset.h421 #define regUVD_VCPU_NONCACHE_SIZE1_BASE_IDX … macro
H A Dvcn_4_0_3_offset.h423 #define regUVD_VCPU_NONCACHE_SIZE1_BASE_IDX … macro