Home
last modified time | relevance | path

Searched refs:regUVD_VCPU_CACHE_SIZE8_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_offset.h65 #define regUVD_VCPU_CACHE_SIZE8_BASE_IDX … macro
H A Dvcn_4_0_0_offset.h413 #define regUVD_VCPU_CACHE_SIZE8_BASE_IDX … macro
H A Dvcn_4_0_3_offset.h415 #define regUVD_VCPU_CACHE_SIZE8_BASE_IDX … macro