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Searched refs:regUVD_JRBC_IB_COND_RD_TIMER_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_offset.h963 #define regUVD_JRBC_IB_COND_RD_TIMER_BASE_IDX macro
H A Dvcn_4_0_0_offset.h883 #define regUVD_JRBC_IB_COND_RD_TIMER_BASE_IDX macro