Searched refs:regTCI_UE_EDC_HI_REG (Results 1 – 2 of 2) sorted by relevance
2134 #define regTCI_UE_EDC_HI_REG … macro
3738 {{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCI_UE_EDC_LO_REG, regTCI_UE_EDC_HI_REG),