Searched refs:regSQ_CE_ERR_STATUS_HI (Results 1 – 2 of 2) sorted by relevance
722 #define regSQ_CE_ERR_STATUS_HI … macro
3663 {{AMDGPU_RAS_REG_ENTRY(GC, 0, regSQ_CE_ERR_STATUS_LO, regSQ_CE_ERR_STATUS_HI),