Searched refs:regSQC_UE_EDC_LO (Results 1 – 2 of 2) sorted by relevance
708 #define regSQC_UE_EDC_LO … macro
3726 {{AMDGPU_RAS_REG_ENTRY(GC, 0, regSQC_UE_EDC_LO, regSQC_UE_EDC_HI),