Searched refs:regSQC_CE_EDC_HI (Results 1 – 2 of 2) sorted by relevance
714 #define regSQC_CE_EDC_HI … macro
3666 {{AMDGPU_RAS_REG_ENTRY(GC, 0, regSQC_CE_EDC_LO, regSQC_CE_EDC_HI),