Home
last modified time | relevance | path

Searched refs:regSPI_GDBG_PER_VMID_CNTL (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_2.c769 WREG32(SOC15_REG_OFFSET(GC, 0, regSPI_GDBG_PER_VMID_CNTL), data); in gfx_v9_4_2_debug_trap_config_init()
H A Dgfx_v9_4_3.c930 data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regSPI_GDBG_PER_VMID_CNTL); in gfx_v9_4_3_xcc_init_compute_vmid()
932 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regSPI_GDBG_PER_VMID_CNTL, data); in gfx_v9_4_3_xcc_init_compute_vmid()
H A Dgfx_v11_0.c1651 data = RREG32_SOC15(GC, 0, regSPI_GDBG_PER_VMID_CNTL); in gfx_v11_0_init_compute_vmid()
1653 WREG32_SOC15(GC, 0, regSPI_GDBG_PER_VMID_CNTL, data); in gfx_v11_0_init_compute_vmid()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h6010 #define regSPI_GDBG_PER_VMID_CNTL … macro
H A Dgc_9_4_3_offset.h3184 #define regSPI_GDBG_PER_VMID_CNTL … macro
H A Dgc_11_0_0_offset.h4584 #define regSPI_GDBG_PER_VMID_CNTL … macro
H A Dgc_11_0_3_offset.h4808 #define regSPI_GDBG_PER_VMID_CNTL … macro