Searched refs:regSP1_UE_ERR_STATUS_HI (Results 1 – 2 of 2) sorted by relevance
742 #define regSP1_UE_ERR_STATUS_HI … macro
3720 {{AMDGPU_RAS_REG_ENTRY(GC, 0, regSP1_UE_ERR_STATUS_LO, regSP1_UE_ERR_STATUS_HI),