Searched refs:regSP0_UE_ERR_STATUS_HI (Results 1 – 2 of 2) sorted by relevance
734 #define regSP0_UE_ERR_STATUS_HI … macro
3717 {{AMDGPU_RAS_REG_ENTRY(GC, 0, regSP0_UE_ERR_STATUS_LO, regSP0_UE_ERR_STATUS_HI),