Searched refs:regSP0_CE_ERR_STATUS_HI (Results 1 – 2 of 2) sorted by relevance
738 #define regSP0_CE_ERR_STATUS_HI … macro
3657 {{AMDGPU_RAS_REG_ENTRY(GC, 0, regSP0_CE_ERR_STATUS_LO, regSP0_CE_ERR_STATUS_HI),