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Searched refs:regSMU_INTERRUPT_CONTROL (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h819 #define regSMU_INTERRUPT_CONTROL … macro
H A Ddcn_3_2_1_offset.h406 #define regSMU_INTERRUPT_CONTROL … macro
H A Ddcn_3_1_4_offset.h1792 #define regSMU_INTERRUPT_CONTROL … macro
H A Ddcn_3_2_0_offset.h406 #define regSMU_INTERRUPT_CONTROL … macro
H A Ddcn_3_1_6_offset.h1023 #define regSMU_INTERRUPT_CONTROL … macro