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Searched refs:regRLC_SMU_SAFE_MODE_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h6407 #define regRLC_SMU_SAFE_MODE_BASE_IDX … macro
H A Dgc_11_0_0_offset.h10299 #define regRLC_SMU_SAFE_MODE_BASE_IDX … macro
H A Dgc_11_0_3_offset.h10921 #define regRLC_SMU_SAFE_MODE_BASE_IDX … macro