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Searched refs:regRLC_GPU_IOV_F32_CNTL (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c1946 tmp = RREG32_SOC15(GC, 0, regRLC_GPU_IOV_F32_CNTL); in gfx_v11_0_load_rlcp_rlcv_microcode()
1948 WREG32_SOC15(GC, 0, regRLC_GPU_IOV_F32_CNTL, tmp); in gfx_v11_0_load_rlcp_rlcv_microcode()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h3512 #define regRLC_GPU_IOV_F32_CNTL macro
H A Dgc_9_4_3_offset.h7196 #define regRLC_GPU_IOV_F32_CNTL macro
H A Dgc_11_0_0_offset.h10778 #define regRLC_GPU_IOV_F32_CNTL macro
H A Dgc_11_0_3_offset.h10084 #define regRLC_GPU_IOV_F32_CNTL macro