Home
last modified time | relevance | path

Searched refs:regRLC_GPU_CLOCK_32_RES_SEL_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h4965 #define regRLC_GPU_CLOCK_32_RES_SEL_BASE_IDX … macro
H A Dgc_9_4_3_offset.h6477 #define regRLC_GPU_CLOCK_32_RES_SEL_BASE_IDX … macro
H A Dgc_11_0_0_offset.h9875 #define regRLC_GPU_CLOCK_32_RES_SEL_BASE_IDX … macro
H A Dgc_11_0_3_offset.h10487 #define regRLC_GPU_CLOCK_32_RES_SEL_BASE_IDX … macro