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Searched refs:regOTG2_OTG_FLOW_CONTROL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h9222 #define regOTG2_OTG_FLOW_CONTROL_BASE_IDX macro
H A Ddcn_3_1_5_offset.h8981 #define regOTG2_OTG_FLOW_CONTROL_BASE_IDX macro
H A Ddcn_3_1_4_offset.h8277 #define regOTG2_OTG_FLOW_CONTROL_BASE_IDX macro
H A Ddcn_3_2_1_offset.h8351 #define regOTG2_OTG_FLOW_CONTROL_BASE_IDX macro
H A Ddcn_3_2_0_offset.h8352 #define regOTG2_OTG_FLOW_CONTROL_BASE_IDX macro
H A Ddcn_3_1_6_offset.h9446 #define regOTG2_OTG_FLOW_CONTROL_BASE_IDX macro