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Searched refs:regOTG1_OTG_STATUS_VF_COUNT_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h9030 #define regOTG1_OTG_STATUS_VF_COUNT_BASE_IDX macro
H A Ddcn_3_1_5_offset.h8791 #define regOTG1_OTG_STATUS_VF_COUNT_BASE_IDX macro
H A Ddcn_3_1_4_offset.h8087 #define regOTG1_OTG_STATUS_VF_COUNT_BASE_IDX macro
H A Ddcn_3_2_1_offset.h8161 #define regOTG1_OTG_STATUS_VF_COUNT_BASE_IDX macro
H A Ddcn_3_2_0_offset.h8162 #define regOTG1_OTG_STATUS_VF_COUNT_BASE_IDX macro
H A Ddcn_3_1_6_offset.h9254 #define regOTG1_OTG_STATUS_VF_COUNT_BASE_IDX macro