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Searched refs:regOTG1_OTG_DRR_CONTROL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h9163 #define regOTG1_OTG_DRR_CONTROL … macro
H A Ddcn_3_1_5_offset.h8922 #define regOTG1_OTG_DRR_CONTROL … macro
H A Ddcn_3_1_4_offset.h8218 #define regOTG1_OTG_DRR_CONTROL … macro
H A Ddcn_3_2_1_offset.h8292 #define regOTG1_OTG_DRR_CONTROL … macro
H A Ddcn_3_2_0_offset.h8293 #define regOTG1_OTG_DRR_CONTROL … macro
H A Ddcn_3_1_6_offset.h9387 #define regOTG1_OTG_DRR_CONTROL … macro