Home
last modified time | relevance | path

Searched refs:regOTG0_OTG_STEREO_CONTROL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h8830 #define regOTG0_OTG_STEREO_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h8593 #define regOTG0_OTG_STEREO_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h7889 #define regOTG0_OTG_STEREO_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h7963 #define regOTG0_OTG_STEREO_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h7964 #define regOTG0_OTG_STEREO_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h9054 #define regOTG0_OTG_STEREO_CONTROL_BASE_IDX … macro