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Searched refs:regOTG0_OTG_INTERRUPT_CONTROL (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h8839 #define regOTG0_OTG_INTERRUPT_CONTROL … macro
H A Ddcn_3_1_4_offset.h7898 #define regOTG0_OTG_INTERRUPT_CONTROL … macro
H A Ddcn_3_2_1_offset.h7972 #define regOTG0_OTG_INTERRUPT_CONTROL … macro
H A Ddcn_3_2_0_offset.h7973 #define regOTG0_OTG_INTERRUPT_CONTROL … macro
H A Ddcn_3_1_6_offset.h9063 #define regOTG0_OTG_INTERRUPT_CONTROL … macro