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Searched refs:regNBIF_SMN_VWR_VCHG_DIS_CTRL_1_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_9_0_offset.h6169 #define regNBIF_SMN_VWR_VCHG_DIS_CTRL_1_BASE_IDX 8 macro
H A Dnbio_4_3_0_offset.h13781 #define regNBIF_SMN_VWR_VCHG_DIS_CTRL_1_BASE_IDX … macro
H A Dnbio_7_7_0_offset.h6703 #define regNBIF_SMN_VWR_VCHG_DIS_CTRL_1_BASE_IDX … macro
H A Dnbio_7_2_0_offset.h7473 #define regNBIF_SMN_VWR_VCHG_DIS_CTRL_1_BASE_IDX … macro