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Searched refs:regMPCC_OGAM3_MPCC_OGAM_RAMA_START_BASE_CNTL_G (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h7237 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_BASE_CNTL_G … macro
H A Ddcn_3_1_5_offset.h6996 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_BASE_CNTL_G … macro
H A Ddcn_3_1_4_offset.h13908 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_BASE_CNTL_G … macro
H A Ddcn_3_2_1_offset.h5522 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_BASE_CNTL_G … macro
H A Ddcn_3_2_0_offset.h5523 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_BASE_CNTL_G … macro
H A Ddcn_3_1_6_offset.h7457 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_BASE_CNTL_G … macro