Home
last modified time | relevance | path

Searched refs:regMPCC_OGAM2_MPCC_OGAM_RAMA_END_CNTL1_G_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h7066 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h6825 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h13737 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h5351 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h5352 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h7286 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_END_CNTL1_G_BASE_IDX … macro