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Searched refs:regMMVM_L2_CNTL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmmhub_v3_0_2.c234 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL); in mmhub_v3_0_2_init_cache_regs()
245 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp); in mmhub_v3_0_2_init_cache_regs()
410 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL); in mmhub_v3_0_2_gart_disable()
412 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp); in mmhub_v3_0_2_gart_disable()
H A Dmmhub_v3_0_1.c235 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL); in mmhub_v3_0_1_init_cache_regs()
246 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp); in mmhub_v3_0_1_init_cache_regs()
405 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL); in mmhub_v3_0_1_gart_disable()
407 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp); in mmhub_v3_0_1_gart_disable()
H A Dmmhub_v3_0.c242 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL); in mmhub_v3_0_init_cache_regs()
253 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp); in mmhub_v3_0_init_cache_regs()
418 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL); in mmhub_v3_0_gart_disable()
420 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp); in mmhub_v3_0_gart_disable()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_3_0_0_offset.h782 #define regMMVM_L2_CNTL … macro
H A Dmmhub_3_0_2_offset.h740 #define regMMVM_L2_CNTL … macro
H A Dmmhub_3_0_1_offset.h1034 #define regMMVM_L2_CNTL … macro