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Searched refs:regMMEA1_DRAM_WR_PRI_QUEUING_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_8_0_offset.h1557 #define regMMEA1_DRAM_WR_PRI_QUEUING_BASE_IDX macro
H A Dmmhub_1_7_offset.h2057 #define regMMEA1_DRAM_WR_PRI_QUEUING_BASE_IDX macro