Home
last modified time | relevance | path

Searched refs:regDSC_TOP3_DSC_TOP_CONTROL_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_4_offset.h11981 #define regDSC_TOP3_DSC_TOP_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h12129 #define regDSC_TOP3_DSC_TOP_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h12120 #define regDSC_TOP3_DSC_TOP_CONTROL_BASE_IDX … macro