Home
last modified time | relevance | path

Searched refs:regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h12840 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h12705 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h11851 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h12023 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h12014 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h13436 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro