Home
last modified time | relevance | path

Searched refs:regDSCL3_SCL_MODE_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h5844 #define regDSCL3_SCL_MODE_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h5603 #define regDSCL3_SCL_MODE_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h6757 #define regDSCL3_SCL_MODE_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h4451 #define regDSCL3_SCL_MODE_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h4452 #define regDSCL3_SCL_MODE_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h6064 #define regDSCL3_SCL_MODE_BASE_IDX … macro