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Searched refs:regDSCL2_DSCL_MEM_PWR_CTRL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h5207 #define regDSCL2_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_3_1_5_offset.h4966 #define regDSCL2_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_3_1_4_offset.h6120 #define regDSCL2_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_3_2_1_offset.h4120 #define regDSCL2_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_3_2_0_offset.h4121 #define regDSCL2_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_3_1_6_offset.h5427 #define regDSCL2_DSCL_MEM_PWR_CTRL … macro