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Searched refs:regDSCL1_LB_V_COUNTER_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h4514 #define regDSCL1_LB_V_COUNTER_BASE_IDX macro
H A Ddcn_3_1_5_offset.h4273 #define regDSCL1_LB_V_COUNTER_BASE_IDX macro
H A Ddcn_3_1_4_offset.h5427 #define regDSCL1_LB_V_COUNTER_BASE_IDX macro
H A Ddcn_3_2_1_offset.h3733 #define regDSCL1_LB_V_COUNTER_BASE_IDX macro
H A Ddcn_3_2_0_offset.h3734 #define regDSCL1_LB_V_COUNTER_BASE_IDX macro
H A Ddcn_3_1_6_offset.h4734 #define regDSCL1_LB_V_COUNTER_BASE_IDX macro