Home
last modified time | relevance | path

Searched refs:regDSCL1_DSCL_CONTROL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h4463 #define regDSCL1_DSCL_CONTROL macro
H A Ddcn_3_1_5_offset.h4222 #define regDSCL1_DSCL_CONTROL macro
H A Ddcn_3_1_4_offset.h5376 #define regDSCL1_DSCL_CONTROL macro
H A Ddcn_3_2_1_offset.h3682 #define regDSCL1_DSCL_CONTROL macro
H A Ddcn_3_2_0_offset.h3683 #define regDSCL1_DSCL_CONTROL macro
H A Ddcn_3_1_6_offset.h4683 #define regDSCL1_DSCL_CONTROL macro