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Searched refs:regDSCL0_DSCL_AUTOCAL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h3802 #define regDSCL0_DSCL_AUTOCAL_BASE_IDX macro
H A Ddcn_3_1_5_offset.h3561 #define regDSCL0_DSCL_AUTOCAL_BASE_IDX macro
H A Ddcn_3_1_4_offset.h4715 #define regDSCL0_DSCL_AUTOCAL_BASE_IDX macro
H A Ddcn_3_2_1_offset.h3327 #define regDSCL0_DSCL_AUTOCAL_BASE_IDX macro
H A Ddcn_3_2_0_offset.h3328 #define regDSCL0_DSCL_AUTOCAL_BASE_IDX macro
H A Ddcn_3_1_6_offset.h4022 #define regDSCL0_DSCL_AUTOCAL_BASE_IDX macro