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Searched refs:regDSCC3_DSCC_RATE_BUFFER0_MAX_FULLNESS_LEVEL (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_4_offset.h12068 #define regDSCC3_DSCC_RATE_BUFFER0_MAX_FULLNESS_LEVEL … macro
H A Ddcn_3_2_1_offset.h12100 #define regDSCC3_DSCC_RATE_BUFFER0_MAX_FULLNESS_LEVEL … macro
H A Ddcn_3_2_0_offset.h12091 #define regDSCC3_DSCC_RATE_BUFFER0_MAX_FULLNESS_LEVEL … macro