Home
last modified time | relevance | path

Searched refs:regDSCC1_DSCC_PPS_CONFIG0 (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h12611 #define regDSCC1_DSCC_PPS_CONFIG0 … macro
H A Ddcn_3_1_5_offset.h12476 #define regDSCC1_DSCC_PPS_CONFIG0 … macro
H A Ddcn_3_1_4_offset.h11740 #define regDSCC1_DSCC_PPS_CONFIG0 … macro
H A Ddcn_3_2_1_offset.h11820 #define regDSCC1_DSCC_PPS_CONFIG0 … macro
H A Ddcn_3_2_0_offset.h11811 #define regDSCC1_DSCC_PPS_CONFIG0 … macro
H A Ddcn_3_1_6_offset.h13207 #define regDSCC1_DSCC_PPS_CONFIG0 … macro