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Searched refs:regDP_STREAM_ENC0_DP_STREAM_ENC_INPUT_MUX_CONTROL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h12985 #define regDP_STREAM_ENC0_DP_STREAM_ENC_INPUT_MUX_CONTROL … macro
H A Ddcn_3_1_5_offset.h12848 #define regDP_STREAM_ENC0_DP_STREAM_ENC_INPUT_MUX_CONTROL … macro
H A Ddcn_3_1_4_offset.h12380 #define regDP_STREAM_ENC0_DP_STREAM_ENC_INPUT_MUX_CONTROL … macro
H A Ddcn_3_2_1_offset.h12232 #define regDP_STREAM_ENC0_DP_STREAM_ENC_INPUT_MUX_CONTROL … macro
H A Ddcn_3_2_0_offset.h12223 #define regDP_STREAM_ENC0_DP_STREAM_ENC_INPUT_MUX_CONTROL … macro
H A Ddcn_3_1_6_offset.h13581 #define regDP_STREAM_ENC0_DP_STREAM_ENC_INPUT_MUX_CONTROL … macro