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Searched refs:regDP4_DP_DPHY_TRAINING_PATTERN_SEL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h10823 #define regDP4_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_3_1_5_offset.h10578 #define regDP4_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_3_1_4_offset.h10744 #define regDP4_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_3_2_1_offset.h9972 #define regDP4_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_3_2_0_offset.h9973 #define regDP4_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_3_1_6_offset.h11047 #define regDP4_DP_DPHY_TRAINING_PATTERN_SEL … macro