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Searched refs:regDP1_DP_DPHY_HBR2_PATTERN_CONTROL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h10089 #define regDP1_DP_DPHY_HBR2_PATTERN_CONTROL … macro
H A Ddcn_3_1_5_offset.h9844 #define regDP1_DP_DPHY_HBR2_PATTERN_CONTROL … macro
H A Ddcn_3_1_4_offset.h9752 #define regDP1_DP_DPHY_HBR2_PATTERN_CONTROL … macro
H A Ddcn_3_2_1_offset.h9202 #define regDP1_DP_DPHY_HBR2_PATTERN_CONTROL … macro
H A Ddcn_3_2_0_offset.h9203 #define regDP1_DP_DPHY_HBR2_PATTERN_CONTROL … macro
H A Ddcn_3_1_6_offset.h10313 #define regDP1_DP_DPHY_HBR2_PATTERN_CONTROL … macro