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Searched refs:regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h10088 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX macro
H A Ddcn_3_1_5_offset.h9843 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX macro
H A Ddcn_3_1_4_offset.h9751 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX macro
H A Ddcn_3_2_1_offset.h9201 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX macro
H A Ddcn_3_2_0_offset.h9202 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX macro
H A Ddcn_3_1_6_offset.h10312 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX macro